/**
 * *****************************************************************
 * @file    adt3102_watchdog.c
 * @author  WuHao(hwu@andartechs.com.cn)
 * @version 1.0.0
 * @date    2020-11-09
 * @brief   
 * @update  2022-02-23, v1.0.1, add target keeping and tracking, cxy
 *                 Copyright (c) 2020, Andar Technologies Inc.
 *                           www.andartechs.com 
 *
 * *****************************************************************
 */
/*------------------------------ include -------------------------------------*/
#include "adt3102_type_define.h"
#include "watchdog_ctype_map.h"
#include "adt3102_gpio.h"
#include "adt3102_watchdog.h"


/*----------------------------- function -------------------------------------*/
/**
 * @brief   watchdog config.
 * @param   reload: clock beats, 50000000 = 1s.
 * @return  None.
 * @note
 */
void watchdogInit(uint32 reload)
{   
    /*RW
    [1]: Enable watchdog reset output, acts as a mask for the reset output.
         Set HIGH to enable the reset, or LOW to disable the reset
    [0]: Enable the interrupt event, Set HIGH to enable the counter and the interrupt,
         or LOW to disable the counter and interrupt.    
    *///we set it to the reset function
    WATCHDOG->WDOGINTCLR =0x01;
    WATCHDOG->WDOGLOAD=reload;
    WATCHDOG->WDOGCONTROL=0x03;
}


/**
 * @brief   watchdog feed.
 * @param   reload: clock beats, 50000000 = 1s.
 * @return  None.
 * @note
 */
void watchdogFeed(uint32 reload)
{   
    /*RW
    When this register is written to, the count is immediately restarted the new value
    The minimum valid value for WDOGLAOD is 1
    */
    WATCHDOG->WDOGLOAD=reload;
}


/**
 * @brief   watchdog lock.
 * @param   isLock: WATCHDOG_UNLOCK: Enable watchdog, unlcok.
 *                  WATCHDOG_LOCK: Disable watchdog, lock.
 * @return  None.
 * @note
 */
void watchdogLock(uint32 isLock)
{   
    /*RW
    Writing a value of 0x1ACCE551 enables 
    write access to all other registers. Writing any other value disables write accesses. A read from 
    this register returns only the bottom bit:
    0: Indicates that write access is enable, not locked
    1: Indicates that write access is disenable, locked
    */
    WATCHDOG->WDOGLOCK = isLock;
}

/**
 * @brief   watchdog close.
 * @param   reload: clock beats, 50000000 = 1s.
 * @return  None.
 * @note
 */
void watchdogClose(void)
{   
    /*RW
    [1]: Enable watchdog reset output, acts as a mask for the reset output.
         Set HIGH to enable the reset, or LOW to disable the reset
    [0]: Enable the interrupt event, Set HIGH to enable the counter and the interrupt,
         or LOW to disable the counter and interrupt.    
    *///we set it to the reset function
    //WATCHDOG->WDOGINTCLR =0x00;
    watchdogLock(WATCHDOG_UNLOCK);
    
    WATCHDOG->WDOGCONTROL=0x00;
    
    watchdogLock(WATCHDOG_LOCK);
}

 /**
 * @brief   init the watch dog.
 * @param   None.
 * @return  None.
 * @note
 */
void initWatchDog(uint32 second)
{
    watchdogLock(WATCHDOG_UNLOCK);

    watchdogInit(50000000*second);

    watchdogLock(WATCHDOG_LOCK);
}

 /**
 * @brief   feed the watch dog.
 * @param   None.
 * @return  None.
 * @note
 */
void feedWatchDog(uint32 second)
{
    watchdogLock(WATCHDOG_UNLOCK);

    watchdogFeed(50000000*second);

    watchdogLock(WATCHDOG_LOCK);
}

